371 lines
31 KiB
Markdown
371 lines
31 KiB
Markdown
# FP-Isa
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Isa mostly made to run a version of a programming language i once made called flagpole
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The compiler for that was written in python and used llvm so that's kinda yucky yk
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and whole new isa so that i can have some fun idk
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Registers (64 bit):
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xSp -> Stack pointer (11111100)
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xBp -> Base pointer (11111101)
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xPc -> Program Counter (11111111)
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r0-r127 -> General purpose (0xxxxxxx) xxxxxxx = r# in bin
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Registers (32 bit):
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h0-h127 -> General purpose (0xxxxxxx) xxxxxxx = h# in bin
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^ Just the bottom 32 bits of r0-r127
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r0 & h0 are both null registers
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in general programming only use h0-h95, the rest are for assembler (or i guess compiler if yours lets you control registers?)
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Flag Register:
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Flag register is small with flags Zero, Negative, Positive, Oddness all as single bits (See SetF instructions)
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Endianness:
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everything is big endian bru (if you don't know what that means you can ignore it)
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Memory addresses:
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Every program is loaded at memory address 0x4000000000000000
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All data between 0xC000000000000000 and 0xD000000000000000 are for MMIO (implementation specific!)
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the stack's base is at 0x7FFFFFFFFFFFFFFF and grows down
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Instructions:
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All instructions start with a 1 byte opcode
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depending on the first bits the operands change
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000: no operands
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001: ^
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010: 1 byte of operands (likely reg)
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011: 2 bytes of operands (likely 2 reg)
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100: ^
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101: 4 bytes of operands (likely immediate)
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110: 1 byte of operands (jump addr reg)
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111: 9 bytes of operands (likely reg, immediate)
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Opcode Table
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+-----------+----------+---------------------------------------------------------------------------+
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| Mneumonic | Opcode | Description |
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+-----------+----------+---------------------------------------------------------------------------+
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| AddR32 | 011xxxxx | AddR32 dst, src adds the value in src to dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| SubR32 | 011xxxxx | SubR32 dst, src subtracts the value in src from dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| MulR32 | 011xxxxx | MulR32 dst, src multiplies the value in dst by src, result in dst (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IMulR32 | 011xxxxx | IMulR32 dst, src multiplies the value in dst by src, result in dst (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| DivR32 | 011xxxxx | DivR32 dst, src divides dst by src, Quo in dst, Rem is ignored (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IDivR32 | 011xxxxx | IDivR32 dst, src divides dst by src, Quo in dst, Rem is ignored (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| ModR32 | 011xxxxx | ModR32 dst, src divides dst by src, Rem in dst, Quo is ignored (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IModR32 | 011xxxxx | IModR32 dst, src divides dst by src, Rem in dst, Quo is ignored (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shr32 | 011xxxxx | Shr32 dst, src logical shifts dst right by src&0b11111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shl32 | 011xxxxx | Shl32 dst, src logical shifts dst left by src&0b11111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Sar32 | 011xxxxx | Sar32 dst, src arithmetic shifts dst right by src&0b11111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| And32 | 011xxxxx | And32 dst, src performs logical ands dst with src and returns in dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| Or32 | 011xxxxx | Or32 dst, src performs logical ors dst with src and returns in dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| Xor32 | 011xxxxx | Xor32 dst, src performs logical xors dst with src and returns in dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| Not32 | 010xxxxx | Not reg performs bitwise not operation on the 32 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| AddR64 | 011xxxxx | AddR64 dst, src adds the value in src to dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| SubR64 | 011xxxxx | SubR64 dst, src subtracts the value in src from dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| MulR64 | 011xxxxx | MulR64 dst, src multiplies the value in dst by src, result in dst (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IMulR64 | 011xxxxx | IMulR64 dst, src multiplies the value in dst by src, result in dst (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| ModR64 | 011xxxxx | ModR64 dst, src divides dst by src, Rem in dst, Quo is ignored (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IModR64 | 011xxxxx | IModR64 dst, src divides dst by src, Rem in dst, Quo is ignored (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| DivR64 | 011xxxxx | DivR64 dst, src divides dst by src, Quo in dst, Rem is ignored (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IDivR64 | 011xxxxx | IDivR64 dst, src divides dst by src, Quo in dst, Rem is ignored (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shr64 | 011xxxxx | Shr64 dst, src logical shifts dst right by src&0b111111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shl64 | 011xxxxx | Shl64 dst, src logical shifts dst left by src&0b111111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Sar64 | 011xxxxx | Sar64 dst, src arithmetic shifts dst right by src&0b111111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| And64 | 011xxxxx | And64 dst, src performs logical ands dst with src and returns in dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| Or64 | 011xxxxx | Or64 dst, src performs logical ors dst with src and returns in dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| Xor64 | 011xxxxx | Xor64 dst, src performs logical xors dst with src and returns in dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| Not64 | 010xxxxx | Not reg performs bitwise not operation on the 64 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| FAdd | 011xxxxx | FAdd dst, src adds src to dst as 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| FSub | 011xxxxx | FSub dst, src subtracts src from dst as 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| FMul | 011xxxxx | FMul dst, src multiplies dst by src as a 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| FDiv | 011xxxxx | FDiv dst, src divides dst by src as a 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| DAdd | 011xxxxx | DAdd dst, src adds src to dst as 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| DSub | 011xxxxx | DSub dst, src subtracts src from dst as 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| DMul | 011xxxxx | DMul dst, src multiplies dst by src as a 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| DDiv | 011xxxxx | DDiv dst, src divides dst by src as a 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| FtoI | 011xxxxx | FtoI dst, src converts src from 32b float to int (trunc), save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| DtoI | 011xxxxx | DtoI dst, src converts src from 64b double to int (trunc), save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| ItoF | 011xxxxx | ItoF dst, src converts src from int to 32b float, save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| ItoD | 011xxxxx | ItoD dst, src converts src from int to 64b double, save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| Jmp | 110xxxxx | Jump Absolutely With 64 bit register value |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIZ | 110xxxxx | Jump Absolutely With 64 bit register value If Zero flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIN | 110xxxxx | Jump Absolutely With 64 bit register value If Negative flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIP | 110xxxxx | Jump Absolutely With 64 bit register value If Positive flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIO | 110xxxxx | Jump Absolutely With 64 bit register value If Parity flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpNZ | 110xxxxx | Jump Absolutely With 64 bit register value If Zero flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpNN | 110xxxxx | Jump Absolutely With 64 bit register value If Negative flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpNP | 110xxxxx | Jump Absolutely With 64 bit register value If Positive flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIE | 110xxxxx | Jump Absolutely With 64 bit register value If Parity flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| St64 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register(64b)|
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+-----------+----------+---------------------------------------------------------------------------+
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| Ld64 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (64b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| St32 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register(32b)|
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+-----------+----------+---------------------------------------------------------------------------+
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| Ld32 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (32b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| St16 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register(16b)|
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+-----------+----------+---------------------------------------------------------------------------+
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| Ld16 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (16b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| St8 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register (8b)|
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+-----------+----------+---------------------------------------------------------------------------+
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| Ld8 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (8b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| RSetF | 010xxxxx | Set flags from 64 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| HSetF | 010xxxxx | Set flags from 64 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| HSetFF | 010xxxxx | Set flags from 32 bit register as a float value (no parity flag) |
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+-----------+----------+---------------------------------------------------------------------------+
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| RSetFD | 010xxxxx | Set flags from 64 bit register as a double value (no parity flag) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Mov64 | 100xxxxx | MovRR dst, src copies the value from src to dst (64 bit registers) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Mov32 | 100xxxxx | MovHR dst, src copies the value from src to dst (32 bit registers) |
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+-----------+----------+---------------------------------------------------------------------------+
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| MovI64 | 110xxxxx | MovI64 dst, imm (7 byte imm) moves imm into the dst register (64 bit) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Halt | 00000000 | Halts the program execution and tells interpreter to kill the process |
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+-----------+----------+---------------------------------------------------------------------------+
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| Nop | 00010000 | Does nothing, interpreter is free to delay around 1ms to calm cpu |
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+-----------+----------+---------------------------------------------------------------------------+
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| Call | 01000000 | Calls the function at the memory address in the register (see call alg) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Ret | 00000001 | Returns from the current function to the parent function (see call alg) |
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+-----------+----------+---------------------------------------------------------------------------+
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# real one ->
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+-----------+----------+---------------------------------------------------------------------------+
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| Mneumonic | Opcode | Description |
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+-----------+----------+---------------------------------------------------------------------------+
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| AddR32 | 01100000 | AddR32 dst, src adds the value in src to dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| SubR32 | 01100001 | SubR32 dst, src subtracts the value in src from dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| MulR32 | 01100010 | MulR32 dst, src multiplies the value in dst by src, result in dst (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IMulR32 | 01100011 | IMulR32 dst, src multiplies the value in dst by src, result in dst (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| DivR32 | 01100100 | DivR32 dst, src divides dst by src, Quo in dst, Rem ignored (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IDivR32 | 01100101 | IDivR32 dst, src divides dst by src, Quo in dst, Rem ignored (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| ModR32 | 01100110 | ModR32 dst, src divides dst by src, Rem in dst, Quo ignored (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IModR32 | 01100111 | IModR32 dst, src divides dst by src, Rem in dst, Quo ignored (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shr32 | 01101000 | Shr32 dst, src logical shifts dst right by src&0b11111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shl32 | 01101001 | Shl32 dst, src logical shifts dst left by src&0b11111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Sar32 | 01101010 | Sar32 dst, src arithmetic shifts dst right by src&0b11111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| And32 | 01101011 | And32 dst, src performs logical and dst with src |
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+-----------+----------+---------------------------------------------------------------------------+
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| Or32 | 01101100 | Or32 dst, src performs logical or dst with src |
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+-----------+----------+---------------------------------------------------------------------------+
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| Xor32 | 01101101 | Xor32 dst, src performs logical xor dst with src |
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+-----------+----------+---------------------------------------------------------------------------+
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| AddR64 | 01101110 | AddR64 dst, src adds the value in src to dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| SubR64 | 01101111 | SubR64 dst, src subtracts the value in src from dst, result in dst (int) |
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+-----------+----------+---------------------------------------------------------------------------+
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| MulR64 | 01110000 | MulR64 dst, src multiplies dst by src, result in dst (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IMulR64 | 01110001 | IMulR64 dst, src multiplies dst by src, result in dst (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| DivR64 | 01110010 | DivR64 dst, src divides dst by src, Quo in dst (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IDivR64 | 01110011 | IDivR64 dst, src divides dst by src, Quo in dst (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| ModR64 | 01110100 | ModR64 dst, src divides dst by src, Rem in dst (uint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| IModR64 | 01110101 | IModR64 dst, src divides dst by src, Rem in dst (sint) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shr64 | 01110110 | Shr64 dst, src logical shifts dst right by src&0b111111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Shl64 | 01110111 | Shl64 dst, src logical shifts dst left by src&0b111111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| Sar64 | 01111000 | Sar64 dst, src arithmetic shifts dst right by src&0b111111 |
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+-----------+----------+---------------------------------------------------------------------------+
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| And64 | 01111001 | And64 dst, src performs logical and dst with src |
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+-----------+----------+---------------------------------------------------------------------------+
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| Or64 | 01111010 | Or64 dst, src performs logical or dst with src |
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+-----------+----------+---------------------------------------------------------------------------+
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| Xor64 | 01111011 | Xor64 dst, src performs logical xor dst with src |
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+-----------+----------+---------------------------------------------------------------------------+
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| Cmp64 | 01111101 | See Cmp section |
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+-----------+----------+---------------------------------------------------------------------------+
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| Cmp32 | 01111100 | See Cmp Section |
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+-----------+----------+---------------------------------------------------------------------------+
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| ICmp64 | 01111111 | See Cmp section |
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+-----------+----------+---------------------------------------------------------------------------+
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| ICmp32 | 01111110 | See Cmp Section |
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+-----------+----------+---------------------------------------------------------------------------+
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| FAdd | 10000000 | FAdd dst, src adds src to dst as 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| FSub | 10000001 | FSub dst, src subtracts src from dst as 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| FMul | 10000010 | FMul dst, src multiplies dst by src as 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| FDiv | 10000011 | FDiv dst, src divides dst by src as 32 bit float |
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+-----------+----------+---------------------------------------------------------------------------+
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| DAdd | 10000100 | DAdd dst, src adds src to dst as 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| DSub | 10000101 | DSub dst, src subtracts src from dst as 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| DMul | 10000110 | DMul dst, src multiplies dst by src as 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| DDiv | 10000111 | DDiv dst, src divides dst by src as 64 bit double |
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+-----------+----------+---------------------------------------------------------------------------+
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| FtoI | 10001000 | FtoI dst, src converts src from 32b float to int (trunc), save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| DtoI | 10001001 | DtoI dst, src converts src from 64b double to int (trunc), save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| ItoF | 10001010 | ItoF dst, src converts src from int to 32b float, save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| ItoD | 10001011 | ItoD dst, src converts src from int to 64b double, save to dst |
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+-----------+----------+---------------------------------------------------------------------------+
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| St64 | 10001100 | St64 src, addr writes src to address in addr register (64b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Ld64 | 10001101 | Ld64 dst, addr reads address in addr register and writes dst (64b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| St32 | 10001110 | St32 src, addr writes src to address in addr register (32b) |
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+-----------+---------+---------------------------------------------------------------------------+
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| Ld32 | 10001111 | Ld32 dst, addr reads address in addr register and writes dst (32b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| St16 | 10010000 | St16 src, addr writes src to address in addr register (16b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Ld16 | 10010001 | Ld16 dst, addr reads address in addr register and writes dst (16b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| St8 | 10010010 | St8 src, addr writes src to address in addr register (8b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Ld8 | 10010011 | Ld8 dst, addr reads address in addr register and writes dst (8b) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Mov64 | 10010100 | Mov64 dst, src copies value from src to dst (64 bit registers) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Mov32 | 10010101 | Mov32 dst, src copies value from src to dst (32 bit registers) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Jmp | 11000000 | Jump absolutely to 64 bit address |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIZ | 11000001 | Jump absolutely to 64 bit address if Zero flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIN | 11000010 | Jump absolutely to 64 bit address if Negative flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIP | 11000011 | Jump absolutely to 64 bit address if Positive flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIO | 11000100 | Jump absolutely to 64 bit address if Parity flag set |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpNZ | 11000101 | Jump absolutely to 64 bit address if Zero flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpNN | 11000110 | Jump absolutely to 64 bit address if Negative flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpNP | 11000111 | Jump absolutely to 64 bit address if Positive flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| JmpIE | 11001000 | Jump absolutely to 64 bit address if Parity flag unset |
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+-----------+----------+---------------------------------------------------------------------------+
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| MovI64 | 11101001 | MovI64 dst, imm moves 8 byte immediate into 64 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| Not32 | 01000000 | Not32 reg performs bitwise not on 32 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| Not64 | 01000001 | Not64 reg performs bitwise not on 64 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| RSetF | 01000010 | Set flags from 64 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| HSetF | 01000011 | Set flags from 64 bit register |
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+-----------+----------+---------------------------------------------------------------------------+
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| HSetFF | 01000100 | Set flags from 32 bit register as float value (no parity flag) |
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+-----------+----------+---------------------------------------------------------------------------+
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| RSetFD | 01000101 | Set flags from 64 bit register as double value (no parity flag) |
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+-----------+----------+---------------------------------------------------------------------------+
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| Call | 01000110 | Calls function at memory address in register |
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+-----------+----------+---------------------------------------------------------------------------+
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| Halt | 00000000 | Halts program execution and tells interpreter to kill process |
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+-----------+----------+---------------------------------------------------------------------------+
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| Nop | 00000001 | Does nothing, interpreter may delay around 1ms |
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+-----------+----------+---------------------------------------------------------------------------+
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| Ret | 00000010 | Returns from current function to parent function |
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+-----------+----------+---------------------------------------------------------------------------+
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Comparisons:
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Cmp32, Cmp64, ICmp32 & ICmp64 directly set flags based on a pair of values A and B
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Based on the result of A-B assuming a sign extension (no dealing with wrapping)
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And therefore should be used for i.e r8 > r9 as in:
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ICmp64 r8, r9
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JmpIP greater
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less_or_eq:
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; ...
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greater:
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; ...
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Calling algorithm:
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This is some horrific mix of c and asm but yk
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void call(uint64_t addr) {
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xSp -= 8;
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mem[xSp] = xBp;
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xSp -= 8;
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mem[xSp] = xPc + 2; // 2 bytes is call instr size
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xBp = xSp;
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xPc = addr;
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}
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void ret() {
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uint64_t addr = mem[xBp];
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uint64_t oldBase = mem[xBp+8];
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xPc = addr;
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xSp = xBp+16;
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xBp = oldBase;
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}
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