31 KiB
FP-Isa
Isa mostly made to run a version of a programming language i once made called flagpole The compiler for that was written in python and used llvm so that's kinda yucky yk and whole new isa so that i can have some fun idk
Registers (64 bit): xSp -> Stack pointer (11111100) xBp -> Base pointer (11111101) xPc -> Program Counter (11111111) r0-r127 -> General purpose (0xxxxxxx) xxxxxxx = r# in bin
Registers (32 bit): h0-h127 -> General purpose (0xxxxxxx) xxxxxxx = h# in bin ^ Just the bottom 32 bits of r0-r127
r0 & h0 are both null registers in general programming only use h0-h95, the rest are for assembler (or i guess compiler if yours lets you control registers?)
Flag Register: Flag register is small with flags Zero, Negative, Positive, Oddness all as single bits (See SetF instructions)
Endianness: everything is big endian bru (if you don't know what that means you can ignore it)
Memory addresses: Every program is loaded at memory address 0x4000000000000000 All data between 0xC000000000000000 and 0xD000000000000000 are for MMIO (implementation specific!) the stack's base is at 0x7FFFFFFFFFFFFFFF and grows down
Instructions: All instructions start with a 1 byte opcode depending on the first bits the operands change 000: no operands 001: ^ 010: 1 byte of operands (likely reg) 011: 2 bytes of operands (likely 2 reg) 100: ^ 101: 4 bytes of operands (likely immediate) 110: 1 byte of operands (jump addr reg) 111: 9 bytes of operands (likely reg, immediate)
Opcode Table
+-----------+----------+---------------------------------------------------------------------------+ | Mneumonic | Opcode | Description | +-----------+----------+---------------------------------------------------------------------------+ | AddR32 | 011xxxxx | AddR32 dst, src adds the value in src to dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | SubR32 | 011xxxxx | SubR32 dst, src subtracts the value in src from dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | MulR32 | 011xxxxx | MulR32 dst, src multiplies the value in dst by src, result in dst (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IMulR32 | 011xxxxx | IMulR32 dst, src multiplies the value in dst by src, result in dst (sint) | +-----------+----------+---------------------------------------------------------------------------+ | DivR32 | 011xxxxx | DivR32 dst, src divides dst by src, Quo in dst, Rem is ignored (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IDivR32 | 011xxxxx | IDivR32 dst, src divides dst by src, Quo in dst, Rem is ignored (sint) | +-----------+----------+---------------------------------------------------------------------------+ | ModR32 | 011xxxxx | ModR32 dst, src divides dst by src, Rem in dst, Quo is ignored (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IModR32 | 011xxxxx | IModR32 dst, src divides dst by src, Rem in dst, Quo is ignored (sint) | +-----------+----------+---------------------------------------------------------------------------+ | Shr32 | 011xxxxx | Shr32 dst, src logical shifts dst right by src&0b11111 | +-----------+----------+---------------------------------------------------------------------------+ | Shl32 | 011xxxxx | Shl32 dst, src logical shifts dst left by src&0b11111 | +-----------+----------+---------------------------------------------------------------------------+ | Sar32 | 011xxxxx | Sar32 dst, src arithmetic shifts dst right by src&0b11111 | +-----------+----------+---------------------------------------------------------------------------+ | And32 | 011xxxxx | And32 dst, src performs logical ands dst with src and returns in dst | +-----------+----------+---------------------------------------------------------------------------+ | Or32 | 011xxxxx | Or32 dst, src performs logical ors dst with src and returns in dst | +-----------+----------+---------------------------------------------------------------------------+ | Xor32 | 011xxxxx | Xor32 dst, src performs logical xors dst with src and returns in dst | +-----------+----------+---------------------------------------------------------------------------+ | Not32 | 010xxxxx | Not reg performs bitwise not operation on the 32 bit register | +-----------+----------+---------------------------------------------------------------------------+ | AddR64 | 011xxxxx | AddR64 dst, src adds the value in src to dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | SubR64 | 011xxxxx | SubR64 dst, src subtracts the value in src from dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | MulR64 | 011xxxxx | MulR64 dst, src multiplies the value in dst by src, result in dst (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IMulR64 | 011xxxxx | IMulR64 dst, src multiplies the value in dst by src, result in dst (sint) | +-----------+----------+---------------------------------------------------------------------------+ | ModR64 | 011xxxxx | ModR64 dst, src divides dst by src, Rem in dst, Quo is ignored (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IModR64 | 011xxxxx | IModR64 dst, src divides dst by src, Rem in dst, Quo is ignored (sint) | +-----------+----------+---------------------------------------------------------------------------+ | DivR64 | 011xxxxx | DivR64 dst, src divides dst by src, Quo in dst, Rem is ignored (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IDivR64 | 011xxxxx | IDivR64 dst, src divides dst by src, Quo in dst, Rem is ignored (sint) | +-----------+----------+---------------------------------------------------------------------------+ | Shr64 | 011xxxxx | Shr64 dst, src logical shifts dst right by src&0b111111 | +-----------+----------+---------------------------------------------------------------------------+ | Shl64 | 011xxxxx | Shl64 dst, src logical shifts dst left by src&0b111111 | +-----------+----------+---------------------------------------------------------------------------+ | Sar64 | 011xxxxx | Sar64 dst, src arithmetic shifts dst right by src&0b111111 | +-----------+----------+---------------------------------------------------------------------------+ | And64 | 011xxxxx | And64 dst, src performs logical ands dst with src and returns in dst | +-----------+----------+---------------------------------------------------------------------------+ | Or64 | 011xxxxx | Or64 dst, src performs logical ors dst with src and returns in dst | +-----------+----------+---------------------------------------------------------------------------+ | Xor64 | 011xxxxx | Xor64 dst, src performs logical xors dst with src and returns in dst | +-----------+----------+---------------------------------------------------------------------------+ | Not64 | 010xxxxx | Not reg performs bitwise not operation on the 64 bit register | +-----------+----------+---------------------------------------------------------------------------+ | FAdd | 011xxxxx | FAdd dst, src adds src to dst as 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | FSub | 011xxxxx | FSub dst, src subtracts src from dst as 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | FMul | 011xxxxx | FMul dst, src multiplies dst by src as a 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | FDiv | 011xxxxx | FDiv dst, src divides dst by src as a 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | DAdd | 011xxxxx | DAdd dst, src adds src to dst as 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | DSub | 011xxxxx | DSub dst, src subtracts src from dst as 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | DMul | 011xxxxx | DMul dst, src multiplies dst by src as a 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | DDiv | 011xxxxx | DDiv dst, src divides dst by src as a 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | FtoI | 011xxxxx | FtoI dst, src converts src from 32b float to int (trunc), save to dst | +-----------+----------+---------------------------------------------------------------------------+ | DtoI | 011xxxxx | DtoI dst, src converts src from 64b double to int (trunc), save to dst | +-----------+----------+---------------------------------------------------------------------------+ | ItoF | 011xxxxx | ItoF dst, src converts src from int to 32b float, save to dst | +-----------+----------+---------------------------------------------------------------------------+ | ItoD | 011xxxxx | ItoD dst, src converts src from int to 64b double, save to dst | +-----------+----------+---------------------------------------------------------------------------+ | Jmp | 110xxxxx | Jump Absolutely With 64 bit register value | +-----------+----------+---------------------------------------------------------------------------+ | JmpIZ | 110xxxxx | Jump Absolutely With 64 bit register value If Zero flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpIN | 110xxxxx | Jump Absolutely With 64 bit register value If Negative flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpIP | 110xxxxx | Jump Absolutely With 64 bit register value If Positive flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpIO | 110xxxxx | Jump Absolutely With 64 bit register value If Parity flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpNZ | 110xxxxx | Jump Absolutely With 64 bit register value If Zero flag unset | +-----------+----------+---------------------------------------------------------------------------+ | JmpNN | 110xxxxx | Jump Absolutely With 64 bit register value If Negative flag unset | +-----------+----------+---------------------------------------------------------------------------+ | JmpNP | 110xxxxx | Jump Absolutely With 64 bit register value If Positive flag unset | +-----------+----------+---------------------------------------------------------------------------+ | JmpIE | 110xxxxx | Jump Absolutely With 64 bit register value If Parity flag unset | +-----------+----------+---------------------------------------------------------------------------+ | St64 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register(64b)| +-----------+----------+---------------------------------------------------------------------------+ | Ld64 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (64b) | +-----------+----------+---------------------------------------------------------------------------+ | St32 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register(32b)| +-----------+----------+---------------------------------------------------------------------------+ | Ld32 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (32b) | +-----------+----------+---------------------------------------------------------------------------+ | St16 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register(16b)| +-----------+----------+---------------------------------------------------------------------------+ | Ld16 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (16b) | +-----------+----------+---------------------------------------------------------------------------+ | St8 | 100xxxxx | Sto src, addr writes the value in src to the address in addr register (8b)| +-----------+----------+---------------------------------------------------------------------------+ | Ld8 | 100xxxxx | Ld dst, addr reads the address in addr register and writes to dst (8b) | +-----------+----------+---------------------------------------------------------------------------+ | RSetF | 010xxxxx | Set flags from 64 bit register | +-----------+----------+---------------------------------------------------------------------------+ | HSetF | 010xxxxx | Set flags from 64 bit register | +-----------+----------+---------------------------------------------------------------------------+ | HSetFF | 010xxxxx | Set flags from 32 bit register as a float value (no parity flag) | +-----------+----------+---------------------------------------------------------------------------+ | RSetFD | 010xxxxx | Set flags from 64 bit register as a double value (no parity flag) | +-----------+----------+---------------------------------------------------------------------------+ | Mov64 | 100xxxxx | MovRR dst, src copies the value from src to dst (64 bit registers) | +-----------+----------+---------------------------------------------------------------------------+ | Mov32 | 100xxxxx | MovHR dst, src copies the value from src to dst (32 bit registers) | +-----------+----------+---------------------------------------------------------------------------+ | MovI64 | 110xxxxx | MovI64 dst, imm (7 byte imm) moves imm into the dst register (64 bit) | +-----------+----------+---------------------------------------------------------------------------+ | Halt | 00000000 | Halts the program execution and tells interpreter to kill the process | +-----------+----------+---------------------------------------------------------------------------+ | Nop | 00010000 | Does nothing, interpreter is free to delay around 1ms to calm cpu | +-----------+----------+---------------------------------------------------------------------------+ | Call | 01000000 | Calls the function at the memory address in the register (see call alg) | +-----------+----------+---------------------------------------------------------------------------+ | Ret | 00000001 | Returns from the current function to the parent function (see call alg) | +-----------+----------+---------------------------------------------------------------------------+
real one ->
+-----------+----------+---------------------------------------------------------------------------+ | Mneumonic | Opcode | Description | +-----------+----------+---------------------------------------------------------------------------+ | AddR32 | 01100000 | AddR32 dst, src adds the value in src to dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | SubR32 | 01100001 | SubR32 dst, src subtracts the value in src from dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | MulR32 | 01100010 | MulR32 dst, src multiplies the value in dst by src, result in dst (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IMulR32 | 01100011 | IMulR32 dst, src multiplies the value in dst by src, result in dst (sint) | +-----------+----------+---------------------------------------------------------------------------+ | DivR32 | 01100100 | DivR32 dst, src divides dst by src, Quo in dst, Rem ignored (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IDivR32 | 01100101 | IDivR32 dst, src divides dst by src, Quo in dst, Rem ignored (sint) | +-----------+----------+---------------------------------------------------------------------------+ | ModR32 | 01100110 | ModR32 dst, src divides dst by src, Rem in dst, Quo ignored (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IModR32 | 01100111 | IModR32 dst, src divides dst by src, Rem in dst, Quo ignored (sint) | +-----------+----------+---------------------------------------------------------------------------+ | Shr32 | 01101000 | Shr32 dst, src logical shifts dst right by src&0b11111 | +-----------+----------+---------------------------------------------------------------------------+ | Shl32 | 01101001 | Shl32 dst, src logical shifts dst left by src&0b11111 | +-----------+----------+---------------------------------------------------------------------------+ | Sar32 | 01101010 | Sar32 dst, src arithmetic shifts dst right by src&0b11111 | +-----------+----------+---------------------------------------------------------------------------+ | And32 | 01101011 | And32 dst, src performs logical and dst with src | +-----------+----------+---------------------------------------------------------------------------+ | Or32 | 01101100 | Or32 dst, src performs logical or dst with src | +-----------+----------+---------------------------------------------------------------------------+ | Xor32 | 01101101 | Xor32 dst, src performs logical xor dst with src | +-----------+----------+---------------------------------------------------------------------------+ | AddR64 | 01101110 | AddR64 dst, src adds the value in src to dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | SubR64 | 01101111 | SubR64 dst, src subtracts the value in src from dst, result in dst (int) | +-----------+----------+---------------------------------------------------------------------------+ | MulR64 | 01110000 | MulR64 dst, src multiplies dst by src, result in dst (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IMulR64 | 01110001 | IMulR64 dst, src multiplies dst by src, result in dst (sint) | +-----------+----------+---------------------------------------------------------------------------+ | DivR64 | 01110010 | DivR64 dst, src divides dst by src, Quo in dst (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IDivR64 | 01110011 | IDivR64 dst, src divides dst by src, Quo in dst (sint) | +-----------+----------+---------------------------------------------------------------------------+ | ModR64 | 01110100 | ModR64 dst, src divides dst by src, Rem in dst (uint) | +-----------+----------+---------------------------------------------------------------------------+ | IModR64 | 01110101 | IModR64 dst, src divides dst by src, Rem in dst (sint) | +-----------+----------+---------------------------------------------------------------------------+ | Shr64 | 01110110 | Shr64 dst, src logical shifts dst right by src&0b111111 | +-----------+----------+---------------------------------------------------------------------------+ | Shl64 | 01110111 | Shl64 dst, src logical shifts dst left by src&0b111111 | +-----------+----------+---------------------------------------------------------------------------+ | Sar64 | 01111000 | Sar64 dst, src arithmetic shifts dst right by src&0b111111 | +-----------+----------+---------------------------------------------------------------------------+ | And64 | 01111001 | And64 dst, src performs logical and dst with src | +-----------+----------+---------------------------------------------------------------------------+ | Or64 | 01111010 | Or64 dst, src performs logical or dst with src | +-----------+----------+---------------------------------------------------------------------------+ | Xor64 | 01111011 | Xor64 dst, src performs logical xor dst with src | +-----------+----------+---------------------------------------------------------------------------+ | Cmp64 | 01111101 | See Cmp section | +-----------+----------+---------------------------------------------------------------------------+ | Cmp32 | 01111100 | See Cmp Section | +-----------+----------+---------------------------------------------------------------------------+ | ICmp64 | 01111111 | See Cmp section | +-----------+----------+---------------------------------------------------------------------------+ | ICmp32 | 01111110 | See Cmp Section | +-----------+----------+---------------------------------------------------------------------------+ | FAdd | 10000000 | FAdd dst, src adds src to dst as 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | FSub | 10000001 | FSub dst, src subtracts src from dst as 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | FMul | 10000010 | FMul dst, src multiplies dst by src as 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | FDiv | 10000011 | FDiv dst, src divides dst by src as 32 bit float | +-----------+----------+---------------------------------------------------------------------------+ | DAdd | 10000100 | DAdd dst, src adds src to dst as 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | DSub | 10000101 | DSub dst, src subtracts src from dst as 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | DMul | 10000110 | DMul dst, src multiplies dst by src as 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | DDiv | 10000111 | DDiv dst, src divides dst by src as 64 bit double | +-----------+----------+---------------------------------------------------------------------------+ | FtoI | 10001000 | FtoI dst, src converts src from 32b float to int (trunc), save to dst | +-----------+----------+---------------------------------------------------------------------------+ | DtoI | 10001001 | DtoI dst, src converts src from 64b double to int (trunc), save to dst | +-----------+----------+---------------------------------------------------------------------------+ | ItoF | 10001010 | ItoF dst, src converts src from int to 32b float, save to dst | +-----------+----------+---------------------------------------------------------------------------+ | ItoD | 10001011 | ItoD dst, src converts src from int to 64b double, save to dst | +-----------+----------+---------------------------------------------------------------------------+ | St64 | 10001100 | St64 src, addr writes src to address in addr register (64b) | +-----------+----------+---------------------------------------------------------------------------+ | Ld64 | 10001101 | Ld64 dst, addr reads address in addr register and writes dst (64b) | +-----------+----------+---------------------------------------------------------------------------+ | St32 | 10001110 | St32 src, addr writes src to address in addr register (32b) | +-----------+---------+---------------------------------------------------------------------------+ | Ld32 | 10001111 | Ld32 dst, addr reads address in addr register and writes dst (32b) | +-----------+----------+---------------------------------------------------------------------------+ | St16 | 10010000 | St16 src, addr writes src to address in addr register (16b) | +-----------+----------+---------------------------------------------------------------------------+ | Ld16 | 10010001 | Ld16 dst, addr reads address in addr register and writes dst (16b) | +-----------+----------+---------------------------------------------------------------------------+ | St8 | 10010010 | St8 src, addr writes src to address in addr register (8b) | +-----------+----------+---------------------------------------------------------------------------+ | Ld8 | 10010011 | Ld8 dst, addr reads address in addr register and writes dst (8b) | +-----------+----------+---------------------------------------------------------------------------+ | Mov64 | 10010100 | Mov64 dst, src copies value from src to dst (64 bit registers) | +-----------+----------+---------------------------------------------------------------------------+ | Mov32 | 10010101 | Mov32 dst, src copies value from src to dst (32 bit registers) | +-----------+----------+---------------------------------------------------------------------------+ | Jmp | 11000000 | Jump absolutely to 64 bit address | +-----------+----------+---------------------------------------------------------------------------+ | JmpIZ | 11000001 | Jump absolutely to 64 bit address if Zero flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpIN | 11000010 | Jump absolutely to 64 bit address if Negative flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpIP | 11000011 | Jump absolutely to 64 bit address if Positive flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpIO | 11000100 | Jump absolutely to 64 bit address if Parity flag set | +-----------+----------+---------------------------------------------------------------------------+ | JmpNZ | 11000101 | Jump absolutely to 64 bit address if Zero flag unset | +-----------+----------+---------------------------------------------------------------------------+ | JmpNN | 11000110 | Jump absolutely to 64 bit address if Negative flag unset | +-----------+----------+---------------------------------------------------------------------------+ | JmpNP | 11000111 | Jump absolutely to 64 bit address if Positive flag unset | +-----------+----------+---------------------------------------------------------------------------+ | JmpIE | 11001000 | Jump absolutely to 64 bit address if Parity flag unset | +-----------+----------+---------------------------------------------------------------------------+ | MovI64 | 11101001 | MovI64 dst, imm moves 8 byte immediate into 64 bit register | +-----------+----------+---------------------------------------------------------------------------+ | Not32 | 01000000 | Not32 reg performs bitwise not on 32 bit register | +-----------+----------+---------------------------------------------------------------------------+ | Not64 | 01000001 | Not64 reg performs bitwise not on 64 bit register | +-----------+----------+---------------------------------------------------------------------------+ | RSetF | 01000010 | Set flags from 64 bit register | +-----------+----------+---------------------------------------------------------------------------+ | HSetF | 01000011 | Set flags from 64 bit register | +-----------+----------+---------------------------------------------------------------------------+ | HSetFF | 01000100 | Set flags from 32 bit register as float value (no parity flag) | +-----------+----------+---------------------------------------------------------------------------+ | RSetFD | 01000101 | Set flags from 64 bit register as double value (no parity flag) | +-----------+----------+---------------------------------------------------------------------------+ | Call | 01000110 | Calls function at memory address in register | +-----------+----------+---------------------------------------------------------------------------+ | Halt | 00000000 | Halts program execution and tells interpreter to kill process | +-----------+----------+---------------------------------------------------------------------------+ | Nop | 00000001 | Does nothing, interpreter may delay around 1ms | +-----------+----------+---------------------------------------------------------------------------+ | Ret | 00000010 | Returns from current function to parent function | +-----------+----------+---------------------------------------------------------------------------+
Comparisons: Cmp32, Cmp64, ICmp32 & ICmp64 directly set flags based on a pair of values A and B Based on the result of A-B assuming a sign extension (no dealing with wrapping) And therefore should be used for i.e r8 > r9 as in: ICmp64 r8, r9 JmpIP greater less_or_eq: ; ... greater: ; ...
Calling algorithm: This is some horrific mix of c and asm but yk void call(uint64_t addr) { xSp -= 8; mem[xSp] = xBp; xSp -= 8; mem[xSp] = xPc + 2; // 2 bytes is call instr size xBp = xSp; xPc = addr; }
void ret() { uint64_t addr = mem[xBp]; uint64_t oldBase = mem[xBp+8];
xPc = addr; xSp = xBp+16; xBp = oldBase; }